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1992-05-13
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6KB
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177 lines
GENOA SuperVGA Chips.
Genoa 5100/5200 Tseng ET3000 chips 256 Kbytes
5300/5400 Tseng ET3000 chips 512 Kbytes
6100 Own chip 256 Kbytes ??
6200/6300 Own chip 256 Kbytes max 800x600/16 or 640x400/256
6400/6600 Own chip 512 Kbytes max 1024x768/16 or 800x600/256
6600 is the 6400 for MicroChannel
64/6600A support 70Hz refresh rate.
3C3h (R/W): Global Enable PS/2 Register
bit 0 VGA Microchannel enabled if set
3C4h index 5 (R/W): Configuration Register
bit 0 (R) PC/AT if set, PS/2 else
1 (R) 8bit bus if set, 16bit else
2 (R) 8bit ROM if set, 16bit else
3 Reserved
4 (R) I/O address 3xx if set, 2xx else
5-6 ROM BIOS size:
0: 24kb ROM
1: 30kb ROM
2: 32kb ROM
3: 0kb ROM
7 8 simultaneous fonts if set, 2 else
3C4h index 6 (R/W): Memory Segment Register
bit 0-2 Read bank no.
3-5 Write bank no.
6 If clear use 3C2h bit 5 as A16 rather than
bit 0/3 of this register.
3C4h index 7 (R/W): Enhanced Control #2
bit 0 External Clock select (bit 2 of a 3bit field).
1 Allow frequencies above 50MHz
2 16 bit video memory access if set
3 VGA on Motherboard if set, Card else
4 Reserved
5 TTL monitor if set, Analog else
6 Non-Maskable Interrupts Enabled if set
7 Reserved
3C4h index 8 (R/W): Enhanced Control #3
bit 0 MDA,Hercules or CGA emulation if set
1 MonoChrome Autoswitch if set
Causes NMI if 3B8h is written to
2 Color Autoswitch if set
Causes NMI if 3D8h is written to
3 EGA operation if set, VGA else
4 60Hz Vertical if set, 70Hz else
5 Enable flicker free function
6 Enable extended memory addressing
7 Enable 1024x768 addressing
3C4h index 10h (R/W): Enhanced Control #4
bit 0 Fast Scroll if set
1 Fast Decode if set
2 Enables 2 bank access if set
3 Pre_Wait enabled if set
4-5 Reserved
6 Fast Write enabled if set
7 Select memory bank 0 or 1
3CEh index 9 (R/W): Enhanced Control #5
bit 6 If set Access even pixels in plane 0/1
and odd pixels in plane 2/3. (Mode 7Fh)
7 If set Display even pixels from plane 0/1
and odd pixels from plane 2/3. (Mode 7Fh)
3CEh index Ah (R/W): Program Status Register 1
bit 0-7 Scratch
3CEh index Bh (R/W): Program Status Register 2
bit 0-7 Scratch
3d4h index 2Eh (R/W): Herchi Register
bit 0 If set Maximum Scan Line Register (3d4h index 9)
is programmable in CGA modes
1 Enables Chinese applications in Hercules mode if set
2-7 Reserved
3d4h index 2Fh (R/W): Interlace Control Register
bit 0 Interlace active if set
1 Enable Quadword addressing mode
2 Select Character Clock as memory addressing counter clock
3 Interlaced Graphics/Alpha mode
4-7 Reserved
46E8h (R): Global Enable PC/AT Register
bit 3 Adapter VGA enabled if set
Bank select:
Seperate read and write banks are selected through 3C4 index 6.
Memory locations:
$C000:$37 2 bytes start of info table from start of ROM
Usually $C000:$B4
$C000:x 1 byte $77
$C000:x+1 1 byte Version.
$00 Genoa 6200 or 6300
$11 Genoa 6400 or 6600
$22 Genoa 6100
$33 Genoa 5100 or 5200 (Tseng 3000)
$55 Genoa 5300 or 5400 (Tseng 3000)
$C000:x+2 2 bytes $6699
ID Genoa Chip Set:
if (meml[$c000:mem[$c000:$37]] and $ffff00ff)=$66990077 then
case mem[$c000:mem[$c000:$37]+1] of
$33,$55:TSENG 3000 chips with special modes;
else GENOA_VGA !!!
ID Genoa Chip Revision:
Case mem[$c000:mem[$c000:$37]+1] of
$22:GENOA_6100
0:GENOA_6200 or GENOA_6300
$11:GENOA_6400 or GENOA_6600
end;
Video Modes:
The Genoa 5xxx series boards use Tseng modes.
The 6xxx series boards use the following modes:
43h T 80 29 2
44h T 80 32 2
45h T 80 44 2
46h T 132 25 2
47h T 132 29 2
48h T 132 32 2
49h T 132 44 2
58h T 80 32 16
59h G 720 512 16
5Ah T 100 42? 16
5Bh G 640 350 256 packed
5Ch G 640 480 256 packed
5Dh G 720 512 256 packed
5Eh G 800 600 256 packed
5Fh G 1024 768 16 planar
60h T 132 25 16
61h T 132 29 16
62h T 132 32 16
63h T 132 44 16
64h T 132 60 16
6Ah G 800 600 16 planar
6Bh T 100 75 16
6Ch G 800 600 256 packed
72h T 80 60 16
73h G 640 480 16 planar
74h T 80 66 16
78h T 100 75 16
79h G 800 600 16 planar
7Dh G 512 512 256 packed
7Eh G 640 400 256 packed
7Fh G 1024 768 4 planar
Mode 7Fh: 1024x768 4 color
2 bits per pixel planar mode
Even pixels are in planes 0 and 1, odd pixels are in planes 2 and 3.